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PD - 95369A
IRFR2405PBF IRFU2405PbF
Surface Mount (IRFR2405) l Straight Lead (IRFU2405) l Advanced Process Technology l Dynamic dv/dt Rating l Fast Switching l Fully Avalanche Rated l Lead-Free Description
l
HEXFET(R) Power MOSFET
D
VDSS = 55V
G S
RDS(on) = 0.016 ID = 56A
Seventh Generation HEXFET(R) Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for throughhole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications.
D-Pak IRFR2405
I-Pak IRFU2405
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
56 40 220 110 0.71 20 130 34 11 5.0 -55 to + 175 300 (1.6mm from case )
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA RJA Junction-to-Case Junction-to-Ambient (PCB mount)* Junction-to-Ambient
Typ.
--- --- ---
Max.
1.4 50 110
Units
C/W
* When mounted on 1" square PCB (FR-4 or G-10 Material) . For recommended footprint and soldering techniques refer to application note #AN-994
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1
12/03/04
IRFR/U2405OPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff.
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. 55 --- --- 2.0 30 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. Max. Units Conditions --- --- V VGS = 0V, ID = 250A 0.052 --- V/C Reference to 25C, ID = 1mA 0.0118 0.016 VGS = 10V, ID = 34A --- 4.0 V VDS = 10V, ID = 250A --- --- S VDS = 25V, ID = 34A --- 20 VDS = 55V, VGS = 0V A --- 250 VDS = 44V, VGS = 0V, TJ = 150C --- 200 VGS = 20V nA --- -200 VGS = -20V 70 110 ID = 34A 16 23 nC VDS = 44V 19 29 VGS = 10V 15 --- VDD = 28V 130 --- ID = 34A ns 55 --- RG = 6.8 78 --- VGS = 10V D Between lead, 4.5 --- 6mm (0.25in.) nH G from package 7.5 --- and center of die contact S 2430 --- VGS = 0V 470 --- pF VDS = 25V 100 --- = 1.0MHz, See Fig. 5 2040 --- VGS = 0V, VDS = 1.0V, = 1.0MHz 350 --- VGS = 0V, VDS = 44V, = 1.0MHz 350 --- VGS = 0V, VDS = 0V to 44V
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 56 showing the A G integral reverse --- --- 220 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 34A, VGS = 0V --- 62 93 ns TJ = 25C, IF = 34A --- 170 260 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 0.22mH R G = 25, IAS = 34A. ISD 34A, di/dt 190A/s, VDD V(BR)DSS, TJ 175C
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 30A
2
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IRFR/U2405PbF
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
100
4.5V
20s PULSE WIDTH TJ = 175 C
1 10 100
4.5V
10 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
10 0.1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.5
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 56A
I D , Drain-to-Source Current (A)
2.0
TJ = 25 C TJ = 175 C
100
1.5
1.0
0.5
10 4.0
V DS = 25V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0 10.0
0.0 -60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFR/U2405OPbF
4000
VGS , Gate-to-Source Voltage (V)
3200
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20
ID = 34A VDS = 44V VDS = 27V VDS = 11V
16
C, Capacitance (pF)
2400
Ciss
12
1600
8
800
Coss Crss
4
0
1
10
100
0 0 20 40
FOR TEST CIRCUIT SEE FIGURE 13
60 80 100
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
ID , Drain Current (A)
100
TJ = 175 C
100
10us
100us 10 1ms
TJ = 25 C
10
1 0.4
V GS = 0 V
0.8 1.2 1.6 2.0 2.4
1 1
TC = 25 C TJ = 175 C Single Pulse
10
10ms
100
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFR/U2405PbF
60
V DS
LIMITED BY PACKAGE
RD
50
VGS RG
D.U.T.
+
I D , Drain Current (A)
40
-VDD
VGS
30
Pulse Width 1 s Duty Factor 0.1 %
20
Fig 10a. Switching Time Test Circuit
VDS 90%
10
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1
D = 0.50 0.20 0.10 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1
0.1
0.05 0.02 0.01
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFR/U2405OPbF
15V
EAS , Single Pulse Avalanche Energy (mJ)
240
TOP
200
VDS
L
DRIVER
BOTTOM
ID 14A 24A 34A
160
RG
20V
D.U.T
IAS tp
+ V - DD
A
120
0.01
Fig 12a. Unclamped Inductive Test Circuit
80
40
V(BR)DSS tp
0 25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
QG QGS VG QGD
12V
Current Regulator Same Type as D.U.T.
50K .2F .3F
D.U.T. VGS
3mA
+ V - DS
Charge
IG ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFR/U2405PbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRFR/U2405OPbF
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRF R120 WIT H AS S EMBLY LOT CODE 1234 AS S EMBLED ON WW 16, 1999 IN T HE AS S EMBLY LINE "A" Note: "P" in ass embly line position indicates "Lead-F ree" PART NUMBER INT ERNAT IONAL RECT IFIER LOGO
IRFU120 12 916A 34
AS S EMBLY LOT CODE
DAT E CODE YEAR 9 = 1999 WEEK 16 LINE A
OR
PART NUMBER INT ERNAT IONAL RECT IFIER LOGO
IRF U120 12 34
DAT E CODE P = DES IGNAT ES LEAD-F REE PRODUCT (OPT IONAL) YEAR 9 = 1999 WEEK 16 A = AS S EMBLY S IT E CODE
AS S EMBLY LOT CODE
8
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IRFR/U2405PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFU120 WIT H ASSEMBLY LOT CODE 5678 ASSE MBLE D ON WW 19, 1999 IN T HE ASSEMBLY LINE "A" Note: "P" in ass embly line pos ition indicates "Lead-Free" PART NUMBER INTE RNAT IONAL RECT IF IER LOGO
IRFU120 919A 56 78
ASSEMBLY LOT CODE
DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A
OR
PART NUMBE R INT ERNAT IONAL RECTIF IER LOGO
IRFU120 56 78
AS SEMBLY LOT CODE
DATE CODE P = DES IGNAT ES LEAD-F REE PRODUCT (OPTIONAL) YEAR 9 = 1999 WE EK 19 A = ASS EMBLY SIT E CODE
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9
IRFR/U2405OPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL
16.3 ( .641 ) 15.7 ( .619 )
16.3 ( .641 ) 15.7 ( .619 )
12.1 ( .476 ) 11.9 ( .469 )
FEED DIRECTION
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 12/04
10
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